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Fader Module

The VHDL code for a fader module decode GAL is shown below.
-----------------------------------------------------------------------------
-- DACS : Distributed Audio Control System
--
-- Copyright (C) 1997 Stephen Scott Richardson
-----------------------------------------------------------------------------
--   File: fader-1.vhd
--   Date: 03.13.97
-- Target: Atmel ATF16V8B
-----------------------------------------------------------------------------
-- Fader board pbus address decoding GAL
-- first fader board
--
-- pbus addx    function          dir (from uC)
-- ==================================================
-- 0x08         a/d mux n_ena     out
-- 0x10         led group 1 ena   out
-- 0x11         led group 2 ena   out
-----------------------------------------------------------------------------

ENTITY fade_decode IS
	PORT (
		addx_in         :  IN bit_vector (6 DOWNTO 0);
		nlatch_in	:  IN bit;		
		nread_write_in	:  IN bit;
		mux_nena_out   :  OUT bit;
		led_ena_2_out   :  OUT bit;
		led_ena_1_out   :  OUT bit;
                nsense_out       :  OUT bit
             );

-- Force a package and a pinout
ATTRIBUTE part_name of fade_decode:entity is "C16V8";
ATTRIBUTE pin_numbers of fade_decode:entity is
	  "nread_write_in:1 nlatch_in:2 addx_in(0):3 addx_in(1):4
           addx_in(2):5 addx_in(3):6 addx_in(4):7 addx_in(5):8
           addx_in(6):9 nsense_out:12 led_ena_1_out:13
           led_ena_2_out:14 mux_nena_out:15";

END fade_decode;


ARCHITECTURE behavior OF fade_decode IS
BEGIN
	PROCESS (nlatch_in, addx_in, nread_write_in)
	BEGIN
		IF nlatch_in = '0' AND nread_write_in = '1'
		   AND addx_in = "0001000" THEN
			
			-- pbus 0x08 

			mux_nena_out <= '0';   -- mux nena ACTIVE
			nsense_out <= '0';     -- pbus nsense ACTIVE
			led_ena_1_out <= '0';  -- led 1 ena INACTIVE
			led_ena_2_out <= '0';  -- led 2 ena INACTIVE

		ELSIF nlatch_in = '0' AND nread_write_in = '1'
		   AND addx_in = "0010000" THEN

			-- pbus 0x10

			mux_nena_out <= '1';   -- mux nena INACTIVE
			nsense_out <= '0';     -- pbus nsense ACTIVE
			led_ena_1_out <= '1';  -- led 1 ena ACTIVE
			led_ena_2_out <= '0';  -- led 2 ena INACTIVE

		ELSIF nlatch_in = '0' AND nread_write_in = '1'
		   AND addx_in = "0010001" THEN

			-- pbus 0x11

			mux_nena_out <= '1';   -- mux nena INACTIVE
			nsense_out <= '0';     -- pbus nsense ACTIVE
			led_ena_1_out <= '0';  -- led 1 ena INACTIVE
			led_ena_2_out <= '1';  -- led 2 ena ACTIVE
		ELSE

			-- not active

			mux_nena_out <= '1';   -- mux nena INACTIVE
			nsense_out <= '1';     -- pbus nsense INACTIVE
			led_ena_1_out <= '0';  -- led 1 ena INACTIVE
			led_ena_2_out <= '0';  -- led 2 ena INACTIVE
		END IF;
	END PROCESS;
END behavior;
The pin report for the fader module decode GAL is shown below.
                        C16V8A
                 ____________________
 nread_write_in =| 1|            |20|* not used       
      nlatch_in =| 2|            |19|* not used       
      addx_in_0 =| 3|            |18|* not used       
      addx_in_1 =| 4|            |17|* not used       
      addx_in_2 =| 5|            |16|* not used       
      addx_in_3 =| 6|            |15|= mux_nena_out   
      addx_in_4 =| 7|            |14|= led_ena_2_out  
      addx_in_5 =| 8|            |13|= led_ena_1_out  
      addx_in_6 =| 9|            |12|= nsense_out     
       not used *|10|            |11|* not used       
                 ____________________


Steve Richardson 2000-07-06
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